Below shows circuit diagram with animation of how to build a Ramp Signal Generator with 2N3904/2N3906 Transistors, resistors and capacitor.
How Ramp Signal Generator built with 2N3904/2N3906 Transistors works?
Main Equation
The capacitor charging current is governed by the constant current equation:
Because $I_C$ is constant, the voltage rate of change $\frac{dV_{ramp}}{dt}$ is constant, generating the linear ramp (sawtooth waveform) shown on the oscilloscope.
Oscillation Condition
Oscillation requires a loop gain $A\beta > 1$ during the discharge phase and a regenerative switching threshold defined by the Programmable Unijunction Transistor (PUT) equivalent circuit ($Q2$ and $Q3$).
Specifically, $Q2$ and $Q3$ conduct and rapidly discharge $C1$ when:
where the gate voltage $V_G$ set by the $R4/R5$ divider is:
Circuit Operation
Linear Ramp Charging (Q1 Constant Current Source)
PNP transistor $Q1$, biased by the divider network $RV1$ and $R2$, holds a fixed voltage across emitter resistor $R3$.
This supplies a constant charging current $I_C \approx \frac{V_{B1} - V_B - V_{EB}}{R3}$ directly into $C1$.
As $C1$ charges, $V_{ramp}$ rises linearly from near $0\text{ V}$.
Triggering & Rapid Discharge (Q2/Q3 Thyristor Pair)
$Q2$ (PNP) and $Q3$ (NPN) form a discrete SCR/PUT switch with its gate biased to $V_G = 2.5\text{ V}$ via $R4$ and $R5$ (given $R4 = R5 = 10\text{ k}\Omega$).
Once $V_{ramp}$ reaches $\approx 3.1\text{ V}$ ($V_G + 0.6\text{ V}$), $Q2$'s emitter-base junction becomes forward-biased.
Collector current from $Q2$ turns on $Q3$, which pulls $Q2$'s base lower, turning $Q2$ on harder (positive feedback loop).
This instantly dumps all charge stored in $C1$ to ground, producing the sharp falling edge of the sawtooth.
Reset & Cycle Repeat
Once $C1$ fully discharges, current drops below the hold current threshold of the $Q2/Q3$ pair, turning them off.
$C1$ resumes charging from the constant current source $Q1$, repeating the cycle continuously.
