Designing a DSBSC Balanced Modulator Using 2N3904 Transistors

byee-diary • • 2 min read
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Here I wanted to show a RF balanced modulator circuit that can produce DSB-SC AM signal at the transistor level with all the bias included. This might be helpful if you want to build your own RF balanced modulator at home. One can use readily available transistors like 2N3904 and the correct biasing is already set-up so that you don't have to worry about how to calculate those bias resistors values. This is single supply modulator which uses Gilbert mixer/modulator topology. The capacitors are mostly coupling capacitors and bypass capacitor which can be easily integrated on DIY PCB.
dsb-sc modulator cicuit diagram

1. Circuit Overview

This circuit is a transistor-level balanced modulator (built using a discrete transistor topology similar to the core of an MC1496 IC). Its primary function is to multiply a Carrier Signal by a Modulating (Message) Signal to produce a Double Sideband Suppressed Carrier (DSBSC) output, commonly used in communications and RF applications.

2. Component breakdown & Subcircuits

A. Power Supply & Biasing

  • Power Rail: The circuit is powered by a +12V rail and referenced to GND.
  • Biasing Resistors:
  • R11, R12, R1, and R2 establish the DC operating points and collector load currents for the differential transistor stages.
  • R13 is tied between the common nodes GA1 and GA2 to balance the cross-coupled differential stages.
  • R9, R10, and R14 provide emitter degeneration/bias return paths to GND for the output differential pair (Q7, Q8) and diode network.

B. Signal Inputs & Coupling

  • Carrier Input (VC):
    • Generated by CARRIER SIGNAL.
    • AC-coupled via C4 (0.01µF) into the upper switching quad (Q2, Q3, etc.).
    • R15 (47Ω) acts as a source termination/damping resistor for the carrier input path.
  • Modulating Input (VS):
  • Generated by MODULATING SIGNAL.
  • AC-coupled via C1 (1µF) and C3 (1µF) into the lower differential amplifier pair.
  • Potentiometer RV1 (50kΩ) along with resistors R6, R7, and R8 forms an adjustable bridge/balancing network used to null out DC offsets and carrier feedthrough.

C. The Modulator Core (Transistor Array Q1 – Q8)

  • Transistors Q1 through Q8 (2N3904 NPNs):
  • Arranged in a Gilbert cell / balanced modulator configuration.
  • The lower transistors act as a transconductance amplifier driven by the modulating signal, while the upper cross-coupled quad (Q1-Q4) acts as a reversing switch controlled by the carrier signal. This four-quad multiplication process achieves the frequency translation (modulation).

D. Output Stage & Diode Network

  • Diode D1 (1N4148): Used in conjunction with biasing resistor R9 for temperature compensation or voltage clamping within the DC bias loop.
  • Output (VO):
  • AC-coupled via output capacitor C5 (1µF) to block DC bias while passing the resulting modulated RF/IF output spectrum.

Summary of Operation

During the circuit operation, the following things happens:

  1. The Modulating Signal varies the tail currents of the differential pair.
  2. The Carrier Signal switches the upper quad transistors on and off at the carrier frequency.
  3. The multiplication of these two signals creates sum and difference frequencies (upper and lower sidebands) at the output VO, while suppressing the original carrier frequency component due to the symmetry of the balanced design.

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