A Typical Input Stage for an Analog Oscilloscope Using a Dual JFET

The front end of any oscilloscope is critical to its performance, dictating how accurately and without distortion external signals are captured. For analog oscilloscopes, a common and effective approach involves a dual JFET differential amplifier, celebrated for its high input impedance, low noise characteristics, and excellent common-mode rejection. This design ensures that the oscilloscope itself does not significantly load the circuit under test, preserving signal integrity.

Circuit Overview: High-Impedance Differential Input

The provided schematic illustrates a classic input stage designed for an analog oscilloscope, leveraging a dual JFET (specifically, the 2N5911) configured as a differential amplifier. This circuit performs several key functions:

• High Input Impedance: Minimizes loading on the signal source.


• Signal Protection: Safeguards the sensitive JFET gates from overvoltage.


• Differential Amplification: Provides gain while rejecting common-mode noise.


• DC Balance Adjustment: Allows calibration to nullify output DC offset.

Key Components and Their Functions

Let's break down the major components that make up this robust input stage:

• Input Impedance & Coupling Network: The input terminal `v_in` connects to a `1 M` resistor to ground, establishing the primary input impedance. Following this, a parallel combination of a `220 k` resistor and a `0.01 µF` capacitor is in series with the signal path leading to the JFET gate. This network likely serves for AC coupling, passing high-frequency signals while blocking DC, and potentially provides frequency compensation for optimal bandwidth response.


• Input Protection Diodes: To protect the delicate JFET gates from excessive voltage swings, a sophisticated clamping arrangement is in place.
  • Two `1N914` diodes are connected back-to-back across the input to the JFET gate. These clamp the voltage to approximately ±0.7 V, preventing small overvoltages from damaging the gate.
  
  
  • Further protection is provided by two `4V7` Zener diodes. One Zener, with its cathode to the JFET gate and anode connected to the -15 V rail via a `3.3 k` resistor, clamps negative excursions. The other, with its anode to the JFET gate and cathode connected to the +15 V rail via another `3.3 k` resistor, handles positive excursions. These Zeners, along with their current-limiting `3.3 k` series resistors, provide a robust clamp at approximately ±4.7 V relative to the respective supply rails, safeguarding against larger transients.


• Dual JFET (2N5911): The heart of the amplifier, the `2N5911` is a dual N-channel JFET chosen for its matched characteristics, high input impedance, and low noise. It forms a differential pair, where the input signal drives the gate of the left JFET, and the gate of the right JFET is used for balance adjustment.


• Bias and Load Resistors:
  • The sources of both JFETs are connected to the -15 V supply via individual `5.6 k` resistors. These resistors establish the necessary bias current for the JFETs to operate in their linear region.
  
  
  • The drain of the left JFET is connected to the +15 V supply via a `3.3 k` resistor. The drain of the right JFET is connected to the wiper of a `20 k` potentiometer, which is then connected to the +15 V supply. This variable resistance allows for precise DC balance adjustment.


• Balance Adjustment Network: A `20 k` potentiometer labeled "Adjust balance" is connected between the +15 V rail and the right JFET's drain circuit via a `100 k` resistor. This allows for fine-tuning the DC operating point of the differential pair, ensuring that when no input signal is present, the differential output `v_out` is zero. A `100` ohm resistor connects the potentiometer's wiper to one of the output lines.

Step-by-Step Operation

When an input signal `v_in` is applied, it first encounters the high input impedance and the AC coupling/compensation network. The signal then passes through the robust diode protection scheme before reaching the gate of the left JFET. The dual JFET configuration amplifies the difference between the voltage at its left gate (driven by `v_in`) and its right gate (set by the balance adjustment). This differential amplification provides excellent common-mode rejection, meaning any noise common to both inputs is largely canceled out, leaving primarily the desired signal amplified. The `v_out` lines provide the amplified differential signal, ready for further processing in the oscilloscope's vertical amplifier chain. The "Adjust balance" potentiometer is crucial for nulling any inherent DC offset that might arise from component mismatches, ensuring a precise zero reference when no signal is applied.

This JFET differential input stage is a fundamental building block in high-performance analog measurement equipment. Its principles are also applied in various other contexts requiring high input impedance and differential amplification, such as in instrumentation amplifiers, where precise signal acquisition is paramount. Understanding how differential amplifiers work is key to appreciating this circuit's effectiveness; for more, see how does a differential amplifier work.

Applications Beyond Oscilloscopes

While this specific circuit is tailored for an oscilloscope input, the fundamental principles of a high-impedance JFET differential amplifier are widely applicable. They are essential in:

• High-Fidelity Audio Preamplifiers: Where low noise and minimal loading of sensitive transducers (like microphones or phono cartridges) are required.


• Sensor Interfaces: For conditioning signals from high-impedance sensors that require precise measurement without introducing errors.


• Test and Measurement Equipment: Any device that needs to accurately measure small signals from high-impedance sources will benefit from such an input stage.

This type of front-end is a testament to the enduring utility of JFETs in precision analog design, providing a clean, unadulterated view of the signals being measured.