Download IRLB8721 Spice Model Free
The model is in
IRLB8721.LIB, with pin order D, G, S. It was built from the datasheet. I used ngspice and checked it against the datasheet numbers:
| Item | Datasheet (typ) | Model |
|---|---|---|
| RDS(on), 10 V, 31 A | 6.5 mΩ | 6.5 mΩ |
| RDS(on), 4.5 V, 25 A | 13.1 mΩ | 13.8 mΩ |
| Gate plateau voltage | 3.7 V | 3.55 V |
| Qgd | 3.4 nC | 3.6 nC |
| Qg at 4.5 V | 7.6 nC | 8.4 nC |
| Body diode, 25 A | 1.0 V max | 0.85 V |
Limits are listed in the file header. The main ones:
- Threshold: I used a Level-1 MOSFET with VTO = 2.6 V. That fits the 3–5 V part of the curves and the gate plateau, not the 1.8 V datasheet threshold. Saturation current at 3.5–4.5 V gate drive is about 20–30% above the curves.
- Cgd: it is a fixed 225 pF, set to give the right Qgd. The real small-signal Crss is lower (110 pF at 15 V).
- Not modeled: temperature, avalanche and package inductance.
To use it in Proteus, attach the .LIB the same way you did the UF4007 and map the pins to D, G, S for Q1 and Q2. Then rerun the same test and compare duty and the LO bump. If you send the terminal output, I can check whether the output follows the pot.
